The present invention relates generally to the packaging of integrated circuits. More particularly, improved micro surface mount die package arrangements are described.
There are a number of conventional processes for packaging integrated circuits. One approach that is commonly referred to as “flip chip” packaging generally contemplates forming solder bumps (or other suitable contacts) directly on the face of an integrated circuit die. In some situations, the contacts are formed directly on I/O pads formed on the die, whereas in other situations the contacts are redistributed. The die is then typically attached to a substrate such as a printed circuit board or package substrate such that the die contacts directly connect to corresponding contacts on the substrate.
An extension of flip chip technology is the micro surface mount die package (μSMD), which is a chip scale package design. Typically, in a micro surface mount die package, the dice are bumped to form the external contacts, but portions of the die are encapsulated or otherwise covered with a suitable protective material. There have been a wide variety of μSMD package designs that have been proposed. By way of example, U.S. Pat. Nos. 6,023,094, 6,245,595 and 6,468,832 disclose some representative designs. The '094 patent and other related patents describe a wafer level arrangement for applying a protective coating to the back surface of the die. The '595 patent and other related patents describe wafer level arrangements for applying an underfill coating to the active surface of a die. The '832 patent describes a micro surface mount die package that includes a die attach pad that forms the back surface of a package.
Although all of these designs work well, there are continuing efforts to provide improved micro surface mount die packages that work particularly well in various specific applications.